5865-01-076-9050">
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TM 11-5865-215-13
2.9
5.8
23.
I
KHZ
KHZ
UP
CHIP SELECT
CRYSTAL
(10124194;
DIVIDER
(10-124194)
(IO-124194)
FRONT PANEL
SWITCH SCAN
ROW ENABLE
BUFFERS
SWITCH MATRIX
(10 124144)
I
I
READ
COLUMNS
I4
I
I
I
I
MEMORY
1/0
READ COLUMNS 58
INTERFACE
MI
READ
COLUMNS
9II
PROCESSOR
I
TEST
I
A
FRONT PANEL
LAMP DRIVERS
I
LATCHES
INPUT
SWITCH LAMPS
(10-124184)
PORT O
PORT O
t
t
INPUT
INPUT
w
PORT 4
PORT I
LAMP
I
BUFFERS
1
INTENSITY
INPUTS
(10-124194)
INPUT
INPuT
I
(10124144)
PANEL
PORT 5
PORT 2
DATA
INTENSITY
READY
CONTROL
I
1
LAY
INPUT
INPUT
w
PORT 6
PORT 3
DATA INPUT
DATA
READ
I
I
REGISTER
CONTROL
LOAD INPUT
INPUT DATA
OUTPUT
INPUT
0
PORT
PORT 7
I
S I X -D I G I T
DECIMAL POINT
OUTPUT
OUTPUT
.
1
DRIvERS
PORT 5
PORT 6
DISPLAY
[10-124154)
`
1
I
I
,
,
RAM
OUTPUT
I
ADDRESS
OUTPu T
DATA TO SDU
DISPLAY DATA
PORT 2
PORT 3
OUTPUT
I
I
BUFFERS
OUTPUT
DATA TO DFCU
.
(10-124154)
FORMAT
CLOCK TO RCVR
(10-124154)
SELECT
OUTPUT
OUTPUT
?
.
CLOCK TO SDU
PORT 4
PORT 7
CLOCK TO OFCU
OUTPUT
OUT PUT I
L
_
_
.
_
_
_
.
,
J
DATA
OUT
STROBE
WRITE
STROBE
4
To
8-II)
4
"
(10124154)
CLARIFIER
CONTROL
MULTIPLEXED
AUDIO FROM RCVR
1
ANALOGTODIGITAL
MANUAL GAIN
(D F)
CONTROL
CONVERTER
READ STROBE
(IO-124174)
DECODER
AUDIO FROM RCVR
C3
(IO-124154)
(I NT
SWEEP/STEP
t
RATE CONTROL
VOLUME
I
AUDIO DRIVER
JACK
(10-124174)
I
Receiver Control
Functional Block Diagram
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