Microprocessor Output Ports - Continued
Provides a signal path for the microprocessor
to address a RAM on CCA A5. Commands written
into this RAM (via the I/0 bus) are subse-
quently transferred to the receiver, SDU dis-
play, and computer interface.
Path by which the microprocessor controls the
length of the data stream outputted from the
temporary storage RAM on CCA A5.
Data stream length
51 bits for receiver or SDU
64 bits for transfer to the
duplicated receiver command
file of the computer.
Data path on which the microprocessor selects
placement of the decimal point for the front
panel 6-digit TUNING FREQUENCY (MHZ) display:
(P/O front panel)
OB52 OB51 --B50
Data path by which the microprocessor selects
binary-converted (front panel) mgc, clarifier,
or sweep/step control data. The microproces-
sor reads the selected data via input port 2
(see table 5-1, input port 2):
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