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Table 5-1. Microprocessor Input Ports - continued - TM-11-5865-215-130041
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TM-11-5865-215-13 Receiver Control C-10026/USQ NSN
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Table 5-2. Microprocessor Output Ports - continued
TM 11-5865-215-13
Table 5-2.
Microprocessor Output Ports - Continued
Output
control
(OC) bits
Output
Associated
Function
3210
port
hardware
3
0011
CCA A5
Provides a signal path for the microprocessor
to address a RAM on CCA A5.  Commands written
into this RAM (via the I/0 bus) are subse-
quently transferred to the receiver, SDU dis-
play, and computer interface.
4
CCA A5
0101
Path by which the microprocessor controls the
length of the data stream outputted from the
temporary storage RAM on CCA A5.
OB41 0B40
Data stream length
()
51 bits for receiver or SDU
1
command transfer.
64 bits for transfer to the
1.
1
duplicated receiver command
file of the computer.
5
CCA A5
Data path on which the microprocessor selects
0101
placement of the decimal point for the front
panel 6-digit TUNING FREQUENCY (MHZ) display:
1.
2.
0.
000
(P/O front panel)
(DS1)(DS2)(DS3)
OB52 OB51 --B50
Active signal---------
----- line
1
1
0
DS1
1
0
1
DS2
0
1
1
DS3
7
Data path by which the microprocessor selects
CCA A3
0111
binary-converted (front panel) mgc, clarifier,
or sweep/step control data.  The microproces-
sor reads the selected data via input port 2
(see table 5-1, input port 2):
5-9

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