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Functional Description - continued
Up
TM-11-5865-215-13 Receiver Control C-10026/USQ NSN
Next
Table 5-1. Microprocessor Input Ports - continued - TM-11-5865-215-130039
TM 11-5865-215-13
Table 5-1.
Microprocessor Input Ports
Output
control
(OC) bits
Input
Associated
Function
port
3210
hardware
Direct path for transfer of spare receiver
control bits (see table l-l) to the micro-
processor:
o
0000
IB00
= bit 43
CCA Al
IB01
= bit 42
IB02
= bit 2
IB03
= bit 1
0001
CCA Al
1
IB11 serves as a direct path for transfer
of one spare receiver bit (bit 50) to the
microprocessor.
IB12 and IB13 are used to control the mode
in which the reciever control operates.
Mode 1 provides a 51-bit receiver command
and a 64-bit storage word to the system com-
puter.  Mode 2 provides a 51-bit receiver
command and a 51-bit storage word to the sys-
tem computer.  Mode 3 provides a 51-bit re-
ceiver command only.
--B1.
I 3
1B12
Mode
1
1
1
1
0
2
1
0
3
0010
Works in conjunction with output port 7 to
CCA A3
2
provide paths for data obtained from the
front panel MGC, CLARIFIER, and SWEEP/STEP
RATE controls.  CCA A3 converts these analog
(front panel) control inputs into equivalent
binary data.  The data are selected by a
unique output port 7 code (see table 5-2,
output port 7), and transferred to the
microprocessor via input port 2:
Selection
output port 7 code
Transfer line
IB20 IB21 IB22 IB23 0B73 0B72 0B71 0B70
1
1
1
0
C3
C4
C5
C6
1
1
0
1
Ml
X
Cl
C2
1
0
1
1
M2
M3
M4
M5
0
1
1
1
STP
SWP
MTB
5-5

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